Visit for additional information on the features of Quartus II software version 11.1īoth the Subscription Edition and the free Web Edition of Quartus II software version 11.1 are now available for download. SoC Design Environment: Quartus II software version 11.1 includes a preview of an integrated SoC design environment that uses hardware/software co-design with Altera’s SoC FPGAs to accelerate the design process, enabling customers to maximize their productivity by using familiar tools and development flows for both processor and FPGA development.
Modelsim altera starter edition 10.3d verification#
Based on TCL, designers using System Console can quickly build verification scripts or custom graphical user interfaces in an advanced programming environment, enabling sophisticated instrumentation and verification solutions for Qsys systems. System Console allows designers to analyze and interpret data and monitor the performance of a system under real-world conditions. The configurable and interactive System Console tool included with the Quartus II software version 11.1 satisfies a wide range of system debug needs. This release also provides additional support for Altera’s high-end 28-nm Stratix V FPGAs, including PCI Express PCIe Gen3 support and bitstream generation capability for DDR3/QDRII memories. Cyclone V FPGAs provide the lowest power and lowest system cost in a 28-nm FPGA. Arria V FPGAs deliver a balance of power, performance and system cost for midrange applications. Quartus II software version 11.1 features compilation support for Arria V FPGAs and Cyclone V FPGAs. “This new version of the Quartus II software allows customers to quickly design, verify and debug their 28-nm designs using the latest in system-level design tools.”
“Support for Arria V and Cyclone V FPGAs allows designers to meet performance requirements and achieve the lowest power in the industry at 28 nm, while lowering system cost in a wide range of applications,” said Alex Grbic, Altera’s director of software, DSP and IP marketing. System Console raises the level of abstraction for debugging and works in tandem with low-level debug tools, such as Altera’s SignalTap II embedded logic analyzer, to significantly reduce verification time. Quartus II software version 11.1 also includes added support for Altera’s system-level debug tool, System Console. This latest software release features expanded support for Altera’s 28-nm FPGAs, including compilation support for Arria V and Cyclone V FPGAs and enhanced support for Stratix V FPGAs. The folks at Altera Corporation have announced the release of their Quartus II software version 11.1, which they modestly describe as “The industry’s number one design software in performance and productivity for CPLD, FPGA and HardCopy ASIC designs.”